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2 Zephyr Don't Boot XeLL? R-Jtag

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Console Type: (Zephyr)
NAND size: 16
Dashboard version:16203
CB version: 4562
Screenshot of NAND details from J-Runner:


J-Runner log:
Quote:

================================================== =
Wednesday, May 29, 2013 5:10:40 PM

J-Runner v0.2 Beta (289) Started



Checking Files
Finished Checking Files
Version: 03
Flash Config: 0x01198010
CB Version: 4562
Zephyr
Reading Nand to C:\Program Files (x86)\J-Runner\output\nanddump1.bin
Reading Nand
Done!
in 2:00 min:sec

Reading Nand to C:\Program Files (x86)\J-Runner\output\nanddump2.bin
Initializing nanddump1.bin..
Nand Initialization Finished
Reading Nand
Done!
in 2:00 min:sec

Comparing...
Bad Block ID @ 0x02E5 [Offset: 0xBF0A00]
Bad Block ID @ 0x02EB [Offset: 0xC09600]
Version: 03
Flash Config: 0x01198010
CB Version: 4562
Zephyr
Reading Nand to C:\Program Files (x86)\J-Runner\output\nanddump1.bin
Reading Nand
Done!
in 2:00 min:sec

Reading Nand to C:\Program Files (x86)\J-Runner\output\nanddump2.bin
Initializing nanddump1.bin..
Nand Initialization Finished
Reading Nand
Done!
in 2:00 min:sec

Comparing...
Nands are the same
Patching Jasper version 2.3 SMC at offset 0x12BA
XeLL file created Successfully zephyr_hack_aud_clamp.bin
Version: 03
Flash Config: 0x01198010
Writing Nand
zephyr_hack_aud_clamp.bin
Done!
in 0:09 min:sec

POST output from J-Runner (either POST_OUT monitor or RATER output):
Code:

Version: 10
Power Up
Waiting for POST to change
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6

Image of R-JTAG board:


Images of close-up soldering to motherboard:




Description of problem:

Just Glitches , sometimes RROD depending on setting.. if I use the 1.2v it RROD right away on all Dips 1-6

Use standard CPU_RST Spot and using Martin C ALT on top of board... Same thing

Both Consoles got

Post A0 - Panic - VERIFY_SECOTP_6

I only need Keys.. everything is Temp

Was the console working before you started: Y

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